SH7763 Datasheet, PDF (1346/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 30 SIM Card Module (SIM)
(b) Retransmission when the smart card interface is in transmit mode (T = 0)
Figure 30.9 shows retransmit operations when the smart card interface is in transmit mode.
Step (1) to step (4) of figure 30.9 correspond to the following operation
1. After completion of transmission of one frame, if an error signal is returned from the receive
side, the ERS bit in SCSSR is set to 1. If the RIE bit in SCSCR is set to enable, an ERI request
is issued. The ERS bit in SCSSR should be cleared to 0 before the sampling timing for the next
parity bit.
2. In T = 0 mode, the TEND bit in SCSSR is not set for a frame when an error signal indicating
an error is received.
3. If no error signal is returned from the receive side, the ERS bit in SCSSR is not set.
4. If no error signal is returned from the receive side, it is assumed that transmission of one
frame, including retransmission, is completed, and the TEND bit in SCSSR is set to 1. At this
time, if the TIE bit in SCSCR is set to enable, a TEI interrupt request is issued.
nth transmit frame
Ds D0 D1 D2 D3 D4 D5 D6 D7 DP DE
Retransmit frame
(n+1) th transmit frame
(DE)
Ds D0 D1 D2 D3 D4 D5 D6 D7 DP Ds D0 D1 D2 D3 D4
TDRE
Transmission from SCTDR to SCTSR
TEND
(2)
ERS
(1)
Transmisson from SCTDR to SCTSR
(4)
(3)
Figure 30.9 Retransmit Standby Mode (Clock Stopped)
when Smart Card Interface is in Transmit Mode
Rev. 1.00 Oct. 01, 2007 Page 1280 of 1956
REJ09B0256-0100