SH7763 Datasheet, PDF (1580/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 36 USB Function Controller (USBF)
36.3.5 Interrupt Flag Register 4 (IFR4)
IFR4 is an interrupt flag register for for TMOUT. When each flag is set to 1 and an interrupt is
enabled in the corresponding bit of IER4, an interrupt request (USBFI0 or USBFI1) specified by
the corresponding bit in ISR4 is issued to INTC.
Clearing the flag is performed by writing 0. Writing 1 is not valid and nothing is changed. To clear
bits, access the register so that 0 should be written only to the bits for the interrupt sources to be
cleared and that 1 should be written to the other bits. Do not use a bit field declaration of the C
language to clear bits.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
————————————————
Initial value: — — — — — — — — — — — — — — — —
R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
— — — — — — — — — — — — — — — TMOUT
Initial value: — — — — — — — — 0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R/W
Bit
Bit Name Initial Value
31 to 8 
Undefined
7 to 1 
All 0
0
TMOUT 0
R/W Description
R Reserved
These bits are always read as undefined value. Write
value should always be 0.
R Reserved
These bits are always read as 0. The write value
should always be 0.
R/W Time Out
[Setting condition]
When the value of the timer register (TMR) is reached
to that of the set time out register (STO).
[Clearing conditions]
• When reset
• When 0 is written to by CPU
Rev. 1.00 Oct. 01, 2007 Page 1514 of 1956
REJ09B0256-0100