SH7763 Datasheet, PDF (778/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 20 16-Bit Timer Pulse Unit (TPU)
Register Name
Area P4
Abbreviation R/W Address*
Area 7
Address*
Access
Size
Timer interrupt enable register_2 TIER_2
R/W H'FFE2 809C H'1FE2 809C 16
Timer status register_2
TSR_2
R/W H'FFE2 80A0 H'1FE2 80A0 16
Timer counter_2
TCNT_2
R
H'FFE2 80A4 H'1FE2 80A4 16
Timer general register A_2
TGRA_2
R
H'FFE2 80A8 H'1FE2 80A8 16
Timer general register B_2
TGRB_2
R
H'FFE2 80AC H'1FE2 80AC 16
Timer general register C_2
TGRC_2
R
H'FFE2 80B0 H'1FE2 80B0 16
Timer general register D_2
TGRD_2
R
H'FFE2 80B4 H'1FE2 80B4 16
Timer control register_3
TCR_3
R/W H'FFE2 80D0 H'1FE2 80D0 16
Timer mode register_3
TMDR_3
R/W H'FFE2 80D4 H'1FE2 80D4 16
Timer I/O control register_3
TIOR_3
R/W H'FFE2 80D8 H'1FE2 80D8 16
Timer interrupt enable register_3 TIER_3
R/W H'FFE2 80DC H'1FE2 80DC 16
Timer status register_3
TSR_3
R/W H'FFE2 80E0 H'1FE2 80E0 16
Timer counter_3
TCNT_3
R
H'FFE2 80E4 H'1FE2 80E4 16
Timer general register A_3
TGRA_3
R
H'FFE2 80E8 H'1FE2 80E8 16
Timer general register B_3
TGRB_3
R
H'FFE2 80EC H'1FE2 80EC 16
Timer general register C_3
TGRC_3
R
H'FFE2 80F0 H'1FE2 80F0 16
Timer general register D_3
TGRD_3
R
H'FFE2 80F4 H'1FE2 80F4 16
Note: * P4 addresses are used when area P4 in the virtual address space is used, and area 7
addresses are used when accessing the register through area 7 in the physical address
space using the TLB.
Rev. 1.00 Oct. 01, 2007 Page 712 of 1956
REJ09B0256-0100