SH7763 Datasheet, PDF (1338/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 30 SIM Card Module (SIM)
1. Follow the initialization procedure above to initialize the smart card interface.
2. Confirm that the ERS bit (error flag) in SCSSR is cleared to 0.
3. Repeat steps (2) and (3) until it can be confirmed that the TDRE flag in SCSSR is set to 1.
4. Write transmit data to SCTDR, and perform transmission. At this time, the TDRE flag is
automatically cleared to 0. When transmission of the start bit is started, the TEND flag is
automatically cleared to 0, and the TDRE flag is automatically set to 1.
5. When performing continuous data transmission, return to step (2).
6. When transmission is ended, clear the TE bit to 0.
Interrupt processing can be performed in the above series of processing.
When the TIE bit is set to 1 to enable interrupt requests and if transmission is started and the
TDRE flag is set to 1, a transmit data empty interrupt (TXI) request is issued. When the RIE bit is
set to 1 to enable interrupt requests and if an error occurs during transmission and the ERS flag is
set to 1, a transmit/receive error interrupt (ERI) request is issued.
For details, refer to Interrupt Operations in section 30.4.5, Data Transmit/Receive Operation.
Rev. 1.00 Oct. 01, 2007 Page 1272 of 1956
REJ09B0256-0100