SH7205 Datasheet, PDF (803/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
16.3.13 Serial Extension Mode Register (SCEMR)
The CPU can always read from or write to SCEMR. Setting the BGDM bit in this register to 1
allows the baud rate generator in the SCIF operates in double-speed mode when asynchronous
mode is selected (by setting the C/A bit in SCSMR to 0) and an internal clock is selected as a
clock source and the SCK pin is set as an input pin (by setting the CKE[1:0] bits in SCSCR to 00).
The base clock frequency in asynchronous mode can be selected by modifying the ABCS bit
setting.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
- BGDM -
-
-
-
-
- ABCS
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R R/W R
R
R
R
R
R R/W
Initial
Bit
Bit Name Value R/W Description
15 to 8 —
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
7
BGDM
0
R/W Baud Rate Generator Double-Speed Mode
When the BGDM bit is set to 1, the baud rate
generator in the SCIF operates in double-speed
mode. This bit is valid only when asynchronous mode
is selected by setting the C/A bit in SCSMR to 0 and
an internal clock is selected as a clock source and the
SCK pin is set as an input pin by setting the CKE[1:0]
bits in SCSCR to 00. In other settings, this bit is
invalid (the baud rate generator operates in normal
mode regardless of the BGDM setting).
0: Normal mode
1: Double-speed mode
6 to 1 —
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
0
ABCS
0
R/W Base Clock Select in Asynchronous Mode
This bit selects the base clock frequency in
asynchronous mode. This bit is valid only in
asynchronous mode (when the C/A bit in SCSMR is
0).
0: Base clock frequency is 16 times the bit rate
1: Base clock frequency is 8 times the bit rate
Rev. 1.00 Mar. 25, 2008 Page 771 of 1868
REJ09B0372-0100