SH7205 Datasheet, PDF (1207/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 USB 2.0 Host/Function Module (USB)
24.3.16 NRDY Interrupt Enable Register (NRDYENB)
NRDYENB enables or disables the NRDY interrupts for individual pipes. If a NRDY interrupt for
which the corresponding bit in this register is set to 1 has occurred, an interrupt request is output to
the interrupt controller.
This register is initialized by a power-on reset.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
—
—
—
PIPE9 PIPE8 PIPE7 PIPE6 PIPE5 PIPE4 PIPE3 PIPE2 PIPE1 PIPE0
NRDYE NRDYE NRDYE NRDYE NRDYE NRDYE NRDYE NRDYE NRDYE NRDYE
Initial value: -
-
-
-
-
-
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name
15 to 10 
Initial
Value
R/W
Undefined R
9
PIPE9NRDYE 0
R/W
8
PIPE8NRDYE 0
R/W
7
PIPE7NRDYE 0
R/W
6
PIPE6NRDYE 0
R/W
Description
Reserved
Undefined values are read from these bits. The write
value should always be 0.
NRDY Interrupt Enable for PIPE9
Enables/disables the interrupt request when PIPE9
NRDY interrupt is detected.
0: Interrupt output disabled
1: Interrupt output enabled
NRDY Interrupt Enable for PIPE8
Enables/disables the interrupt request when PIPE8
NRDY interrupt is detected.
0: Interrupt output disabled
1: Interrupt output enabled
NRDY Interrupt Enable for PIPE7
Enables/disables the interrupt request when PIPE7
NRDY interrupt is detected.
0: Interrupt output disabled
1: Interrupt output enabled
NRDY Interrupt Enable for PIPE6
Enables/disables the interrupt request when PIPE6
NRDY interrupt is detected.
0: Interrupt output disabled
1: Interrupt output enabled
Rev. 1.00 Mar. 25, 2008 Page 1175 of 1868
REJ09B0372-0100