SH7205 Datasheet, PDF (1198/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 USB 2.0 Host/Function Module (USB)
Initial
Bit
Bit Name Value
R/W Description
12

Undefined R
Reserved
Undefined value is read from this bit. The write value
should always be 0.
11 to 0 DTLN[11:0] H'000
R
Receive Data Length
Indicates the length of the received data.
These bits indicate different values depending on the
RCNT bit value as described below.
• RCNT = 0:
These bits retain the length of received data until
all the received data are read from a single FIFO
buffer plane.
If BFRE is 1, however, these bits retain the length
of the received data until BCLR is set to 1 even
after all the data has been read.
• RCNT = 1:
The value of these bits is decremented each time
data is read from the FIFO buffer. (The value is
decremented by one when MBW = 00, by two
when MBW = 01, and by four when MBW = 10.)
DTLN becomes 0 when all the data has been read
from one FIFO buffer plane. However, in double
buffer mode, if data has been received in one FIFO
buffer plane before all the data has been read from
the other plane, this module sets these bits to
indicate the length of the receive data in the former
plane when all the data has been read from the latter
plane.
Note: When RCNT is 1, it takes 10 bus cycles until
DTLN is updated after the FIFO port is read.
Notes: 1. Only 1 can be written to.
2. Only 0 can be read and 1 can be written to.
Rev. 1.00 Mar. 25, 2008 Page 1166 of 1868
REJ09B0372-0100