SH7205 Datasheet, PDF (1399/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 26 2D Graphics Engine (2DG)
Initial
Bit
Bit name
Value
R/W Description
29, 28 VDLT_INTGR 00
R/W Vertical-Direction Delta Computation Result Integer
Part
These bits set the integer part of the delta
computation result in the vertical direction.
27 to 16 VDLT_DCML H'000
R/W Vertical-Direction Delta Computation Result
Fractional Part
These bits set the fractional part of the delta
computation result in the vertical direction.
15, 14 
Undefined R Reserved
The read value is undefined. The write value should
always be 0.
13, 12 HDLT_INTGR 00
R/W Horizontal-Direction Delta Computation Result
Integer Part
These bits set the integer part of the delta
computation result in the horizontal direction.
11 to 0 HDLT_DCML H'000
R/W Horizontal-Direction Delta Computation Result
Fractional Part
These bits set the fractional part of the delta
computation result in the horizontal direction.
Note: This register must be set before resizing. If resizing is not performed, this register need not
be set.
• If one line of data to be transferred by the CPU is 65 pixels or more when an enlargement
resizing in the vertical direction is performed, there may be a case that the pixels at the same
lines should be transferred twice by the CPU. For details, see section 26.4.3 (6), Duplicate-
Line Setting of Enlargement Resizing.
Rev. 1.00 Mar. 25, 2008 Page 1367 of 1868
REJ09B0372-0100