SH7205 Datasheet, PDF (1554/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 28 I/O Ports
• Bits 12, 10, 8 of PEDRL
Pin Function
General input
Other than general output
Read Operation
Pin state
Pin state
Write Operation
Ignored
Ignored
28.2.10 Port E Port Register L (PEPRL)
PEPRL is a 16-bit read-only register, in which the PE13PR to PE0PR bits correspond to the PE13
to PE0 pins, respectively. PEPRL always returns the states of the pins regardless of the PFC
setting.
Bit: 15
-
Initial value: 0
R/W: R
14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
PE13 PE12 PE11 PE10 PE9 PE8 PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
PR PR PR PR PR PR PR PR PR PR PR PR PR PR
0 PE13 PE12 PE11 PE10 PE9 PE8 PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit
15, 14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Initial
Bit Name Value R/W
—
All 0
R
PE13PR
PE12PR
PE11PR
PE10PR
PE9PR
PE8PR
PE7PR
PE6PR
PE5PR
PE4PR
PE3PR
PE2PR
PE1PR
PE0PR
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Description
Reserved
These bits are always read as 0 and cannot be
modified.
The pin state is returned regardless of the PFC setting.
These bits cannot be modified.
Rev. 1.00 Mar. 25, 2008 Page 1522 of 1868
REJ09B0372-0100