SH7205 Datasheet, PDF (1856/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 33 Electrical Characteristics
IODREQ
(Device)
IODACK#
(Host)
(STOP)
IDEIOWR#
(Host)
(HDMARDY#)
IDEIORD#
(Host)
(DSTROBE)
IDEIORDY
(Device)
Read
IDED[15:0]
t_RP
t_RFS
t_LI
t_AZ
t_MLI
t_ZAH
t_ACK
t_ACK
t_MLI
t_LI
t_IORDYZ
t_CVS
t_CVH
CRC
t_ACK
IDECS#[1:0]
IDEA[2:0]
Figure 33.69 Host Terminating Ultra DMA Data-In Burst
Rev. 1.00 Mar. 25, 2008 Page 1824 of 1868
REJ09B0372-0100