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SH7205 Datasheet, PDF (1770/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Section 32 List of Registers
Module
Name
2DG
Register
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Abbreviation 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
GR_MIXPLY



























EXTEN



OUTEN
GR_DOSTAT 















DISP_STAT[1:0]
SEHF_STAT[1:0]


DCHF_STAT[1:0]
SBHF_STAT[1:0]
SAHF_STAT[1:0]


SB_REND SA_REND
GR_IRSTAT







IRQ_DEMPT

IRQ_ASHFUL IRQ_DHFUL IRQ_SHFUL 




INT_VSYC INT_UDFL INT_FILD 


INT_DEMPT

INT_ASHFUL INT_DHFUL INT_SHFUL 


INT_GR
GR_INTMSK

















MSK_VSYC MSK_UDFL MSK_FILD 


MSK_DEMPT

MSK_ASHFUL MSK_DHFUL MSK_SHFUL 


MSK_GR
GR_INTDIS

















DIS_VSYC DIS_UDFL DIS_FILD 


DIS_DEMPT

DIS_ASHFUL DIS_DHFUL DIS_SHFUL 


DIS_GR
GR_DMAC


SZSEL2
SZSEL1














DM1_DSEL[1:0]
DM2_DSEL[1:0]
DM34_DSEL[1:0]


DM1_MSEL[1:0]
DM2_MSEL[1:0]
DM34_MSEL[1:0]
GR_SABSET 






SSHIGH[8]
SSHIGH[7:0]







SSWIDH[8]
SSWIDH[7:0]
Rev. 1.00 Mar. 25, 2008 Page 1738 of 1868
REJ09B0372-0100