SH7205 Datasheet, PDF (218/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 7 Interrupt Controller (INTC)
Bit
7 to 5
4
3 to 0
Bit Name

Initial
Value
All 0
MON
0

All 0
R/W Description
R
Reserved
These bits are always read as 0. The write value should
always be 0.
R
Interrupt Request Monitor
This bit is used to monitor the status of interrupt requests
from on-chip peripheral modules.
0: No interrupt request has been made from on-chip
peripheral module.
1: Interrupt request has been made from on-chip peripheral
module.
R
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 1.00 Mar. 25, 2008 Page 186 of 1868
REJ09B0372-0100