SH7205 Datasheet, PDF (1556/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 28 I/O Ports
Table 28.7 Port F Data Register L (PFDRL) Read/Write Operation
• Bits 4 to 0 of PFDRL
PFIORL
0
1
Pin Function
General input
Read Operation
Pin state
Other than
general input
General output
Other than
general output
Pin state
PFDRL value
PFDRL value
Write Operation
Can write to PFDRL, but it has no effect on pin
state
Can write to PFDRL, but it has no effect on pin
state
Value written is output from pin
Can write to PFDRL, but it has no effect on pin
state
28.2.12 Port F Port Register L (PFPRL)
PFPRL is a 16-bit read-only register, in which the PF4PR to PF0PR bits correspond to the PF4 to
PF0 pins, respectively. PFPRL always returns the states of the pins regardless of the PFC setting.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
PF4 PF3 PF2 PF1 PF0
PR PR PR PR PR
Initial value: 0
0
0
0
0
0
0
0
0
0
0 PF4 PF3 PF2 PF1 PF0
R/W: R
R
R
R
R
R
R
R
R
R
RR
R
R
R
R
Initial
Bit
Bit Name Value R/W
15 to 5 —
All 0
R
4
PF4PR Pin state R
3
PF3PR Pin state R
2
PF2PR Pin state R
1
PF1PR Pin state R
0
PF0PR Pin state R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
The pin state is returned regardless of the PFC setting.
These bits cannot be modified.
Rev. 1.00 Mar. 25, 2008 Page 1524 of 1868
REJ09B0372-0100