SH7205 Datasheet, PDF (1252/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 USB 2.0 Host/Function Module (USB)
Bit
Bit Name
Initial
Value R/W
Description
1, 0
PID[1:0]
00
R/W Even if the PID bits are modified to NAK after this
module has issued S-Split of the split transaction for
the specified pipe (while CSSTS indicates 1), this
module continues the transaction until C-Split is
completed.
[When the function controller function is selected]
This module modifies the setting of these bits in the
following conditions.
• This module modifies PID to NAK on receiving a
setup packet. Here, this module sets VALID to
1, and the setting of PID cannot be changed
until VALID is cleared to 0.
• This module sets PID to STALL if it receives
data exceeding the maximum packet size when
PID is set to BUF.
• This module sets PID to STALL on detecting a
control transfer sequence error.
• This module sets PID to NAK on detecting the
USB bus reset.
This module does not reference to the PID bits
while it is processing a SET_ADDRESS request
(auto processing).
00: NAK response
01: BUF response (depends on the buffer state)
10: STALL response
11: STALL response
Notes: ∗ When the function controller function is selected, bits SUREQ, CSCLR, CSSTS,
SUREQCLR, and PINGE should be cleared to all 0s.
When the host controller function is selected, bit CCPL should be cleared to 0.
1. This bit is always read as 0.
2. Only 1 can be written to.
3. These bits should be modified while CSSTS is 0 and PID is NAK. Before modifying this
bit after modifying the PID bits from BUF to NAK, make sure that CSSTS and PBUSY
are 0. However, if the PID bits have been modified to NAK by this module, checking
PBUSY is not necessary.
Rev. 1.00 Mar. 25, 2008 Page 1220 of 1868
REJ09B0372-0100