SH7205 Datasheet, PDF (1160/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 USB 2.0 Host/Function Module (USB)
24.3 Register Description
Table 24.2 shows the register configuration of the USB.
Table 24.2 Register Configuration
Register Name
Abbreviation R/W
PORT0 system configuration SYSCFG0 R/W
control register
PORT1 system configuration SYSCFG1 R/W
control register
PORT0 system configuration SYSSTS0
R
status register
PORT1 system configuration SYSSTS1
R
status register
PORT0 device state control
register
DVSTCTR0 R/W
PORT1 device state control
register
DVSTCTR1 R/W
Test mode register
TESTMODE R/W
DMA0 pin configuration register D0FBCFG R/W
DMA1 pin configuration register D1FBCFG R/W
CFIFO port register
CFIFO
R/W
D0FIFO port register
D0FIFO
R/W
D1FIFO port register
D1FIFO
R/W
CFIFO port select register
CFIFOSEL R/W
CFIFO port control register
CFIFOCTR R/W
D0FIFO port select register D0FIFOSEL R/W
D0FIFO port control register D0FIFOCTR R/W
D1FIFO port select register D1FIFOSEL R/W
D1FIFO port control register D1FIFOCTR R/W
Interrupt enable register 0
INTENB0
R/W
Interrupt enable register 1
INTENB1
R/W
Interrupt enable register 2
INTENB2
R/W
BRDY interrupt enable register BRDYENB R/W
Initial Value Address
H'xx0x
H'FFFF0000
Access
Size
16
H'xxxF
H'FFFF0002 16
H'xxxx
H'FFFF0004 16
H'xxxx
H'FFFF0006 16
H'xx0x
H'FFFF0008 16
H'xx0x
H'FFFF000A 16
H'xxx0
H'xxxx
H'xxxx
H'00000000
H'00000000
H'00000000
H'xxxx
H'x000
H'0xxx
H'x000
H'0xxx
H'x000
H'00xx
H'xxxx
H'xxxx
H'xx00
H'FFFF000C
H'FFFF0010
H'FFFF0012
H'FFFF0014
H'FFFF0018
H'FFFF001C
H'FFFF0020
H'FFFF0022
H'FFFF0028
H'FFFF002A
H'FFFF002C
H'FFFF002E
H'FFFF0030
H'FFFF0032
H'FFFF0034
H'FFFF0036
16
16
16
8, 16, 32
8, 16, 32
8, 16, 32
16
16
16
16
16
16
16
16
16
16
Rev. 1.00 Mar. 25, 2008 Page 1128 of 1868
REJ09B0372-0100