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SH7205 Datasheet, PDF (1802/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Section 33 Electrical Characteristics
33.4.3 Bus Timing
Table 33.8 Bus Timing
Conditions: VCC = PLLVCC = 1.1 to 1.3 V, USBDVCC = 1.1 to 1.3 V, USBAVCC = 1.1 to 1.3 V,
PVCC = 3.0 to 3.6 V, AVCC = 3.0 to 3.6 V, USBAPVCC = 3.0 to 3.6 V,
2DGAPVCC0 = 3.0 to 3.6 V, 2DGAPVCC1 = 3.0 to 3.6 V,
VSS = PLLVSS = USBAVSS = AVSS = USBAPVSS = 2DGAPVSS0 = 2DGAPVSS1 = 0 V,
Ta = −20 to 85 °C
Item
Address delay time 1
(external space)
Address delay time 2
(SDRAM space)
Byte control delay time
Symbol
t
AD1
Bφ = 66.66 MHz*
Min.
Max.
1
13
tAD2
1
13
t
BCD

13
Chip select delay time 1
t
1
13
CSD1
(external space)
Chip select delay time 2
tCSD2
1
13
(SDRAM space)
Read strobe delay time
tRSD

13
Read data setup time 1
tRDS1
7

(external space)
Read data setup time 2
t
7
RDS2

(SDRAM space)
Read data hold time 1
t
2
RDH1

(external space)
Read data hold time 2
t
2
RDH2

(SDRAM space)
Read/write mode delay time tRWM
1
13
Write enable delay time 1
t
WED1

13
(external space)
Write enable delay time 2
t
1
13
WED2
(SDRAM space)
Unit Figure
ns
Figures 33.11 to
33.15
ns
Figures 33.16 to
33.22
ns
Figures 33.11 to
33.15
ns
Figures 33.11 to
33.15
ns
Figures 33.16 to
33.22
ns
Figures 33.11 to
33.13, 33.15
ns
Figures 33.11 to
33.13, 33.15
ns
Figures 33.16,
33.18, 33.20
ns
Figures 33.11 to
33.13, 33.15
ns
Figures 33.16,
33.18, 33.20
ns
Figures 33.11 to
33.15
ns
Figures 33.11, 33.14
ns
Figures 33.17,
33.19, 33.21
Rev. 1.00 Mar. 25, 2008 Page 1770 of 1868
REJ09B0372-0100