SH7205 Datasheet, PDF (488/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
Table 12.1 MTU2 Functions
Item
Count clock
General registers
General registers/
buffer registers
I/O pins
Counter clear
function
Compare
match
output
0 output
1 output
Toggle
output
Input capture
function
Synchronous
operation
PWM mode 1
PWM mode 2
Complementary
PWM mode
Reset PWM mode
AC synchronous
motor drive mode
Channel 0
Pφ/1
Pφ/4
Pφ/16
Pφ/64
TCLKA
TCLKB
TCLKC
TCLKD
TGRA_0
TGRB_0
TGRE_0
TGRC_0
TGRD_0
TGRF_0
TIOC0A
TIOC0B
TIOC0C
TIOC0D
TGR compare
match or input
capture
√
√
√
√
√
√
√
—
—
√
Channel 1
Pφ/1
Pφ/4
Pφ/16
Pφ/64
Pφ/256
TCLKA
TCLKB
TGRA_1
TGRB_1
—
TIOC1A
TIOC1B
TGR compare
match or input
capture
√
√
√
√
√
√
√
—
—
—
Channel 2
Pφ/1
Pφ/4
Pφ/16
Pφ/64
Pφ/1024
TCLKA
TCLKB
TCLKC
TGRA_2
TGRB_2
—
TIOC2A
TIOC2B
TGR compare
match or input
capture
√
√
√
√
√
√
√
—
—
—
Channel 3
Pφ/1
Pφ/4
Pφ/16
Pφ/64
Pφ/256
Pφ/1024
TCLKA
TCLKB
TGRA_3
TGRB_3
TGRC_3
TGRD_3
TIOC3A
TIOC3B
TIOC3C
TIOC3D
TGR compare
match or input
capture
√
√
√
√
√
√
—
√
√
√
Channel 4
Pφ/1
Pφ/4
Pφ/16
Pφ/64
Pφ/256
Pφ/1024
TCLKA
TCLKB
TGRA_4
TGRB_4
TGRC_4
TGRD_4
TIOC4A
TIOC4B
TIOC4C
TIOC4D
TGR compare
match or input
capture
√
√
√
√
√
√
—
√
√
√
Rev. 1.00 Mar. 25, 2008 Page 456 of 1868
REJ09B0372-0100