SH7205 Datasheet, PDF (454/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 11 Direct Memory Access Controller (DMAC)
11.3.27 DMA Reload Two-Dimensional Addressing Next Line Offset Register
(DMR2DNLOSTm)
DMR2DNLOSTm is a register used to set the offset to be reloaded to the DMA two-dimensional
addressing next line offset register (DM2DNLOSTm). To enable the reload function, set the two-
dimensional reload function enable bit (2DRLOD) of DMA control register A (DMCNTAm) to 1.
When enabled, it is necessary to set both the DMA two-dimensional addressing next line offset
register (DM2DNLOSTm) and DMA reload two-dimensional addressing next line offset register
(DMR2DNLOSTm).
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
DRNLOST[31:16]
Initial value: -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
DRNLOST[15:0]
Initial value: -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value
R/W Description
31 to 0
DRNLOST Undefined
[31:0]
R/W DMA Next Line Offset Byte Count for Reloading
These bits are used to set the number of offset bytes to be
reloaded to the DMA two-dimensional addressing next line
offset register. Set these bits by using a complement of 2.
Rev. 1.00 Mar. 25, 2008 Page 422 of 1868
REJ09B0372-0100