SH7205 Datasheet, PDF (240/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 7 Interrupt Controller (INTC)
7.6.2 Stack Status after Interrupt Exception Handling
Figure 7.3 shows the stack status after interrupt exception handling.
Address
4n – 8 PC*¹
4n – 4 SR
4n
32 bits
32 bits
SP*²
Notes: 1. PC: Start address of the next instruction (return destination instruction)
after the executed instruction
2. Always make sure that SP is a multiple of 4.
Figure 7.3 Stack Status after Interrupt Exception Handling
Rev. 1.00 Mar. 25, 2008 Page 208 of 1868
REJ09B0372-0100