SH7205 Datasheet, PDF (326/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 10 Bus State Controller (BSC)
Bit
2 to 0
Initial
Bit Name Value
R/W Description
DSZ[2:0] Undefined R/W Channel Size Setting
These bits specify the size for channels 0 and 1. If a size
smaller than SDRAM area 0 or 1 is selected, the
remaining portion is regarded as a shadow area.
000: Setting prohibited
001: 8MB
010: 16MB
011: 32MB
100: 64MB
101 to 111: Setting prohibited
Rev. 1.00 Mar. 25, 2008 Page 294 of 1868
REJ09B0372-0100