SH7205 Datasheet, PDF (1295/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 USB 2.0 Host/Function Module (USB)
24.4.2 Interrupt Functions
(1) Interrupt Control Overview
Table 24.20 lists the interrupt generation conditions for this module.
When an interrupt generation condition is satisfied and the interrupt output is enabled using the
corresponding interrupt enable register, this module outputs the USB interrupt request signal to the
INTC.
Table 24.20 Interrupt Generation Conditions
Bit
VBINT
RESM
SOFR
Interrupt Name Cause of Interrupt
Function That
Generates the Related
Interrupt
Status
VBUS interrupt When a change in the state of the
VBUS input pin has been detected
(low to high or high to low)
Host,
function
VBSTS
Resume
interrupt
When a change in the state of the USB Function

bus has been detected in the
suspended state
(J-state to K-state or J-state to SE0)
Frame number When the host controller function is Host,

update interrupt selected:
function
• When an SOF packet with a
different frame number has been
transmitted
When the function controller function is
selected:
• When an SOF packet with a
different frame number is received
Rev. 1.00 Mar. 25, 2008 Page 1263 of 1868
REJ09B0372-0100