SH7205 Datasheet, PDF (1301/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 USB 2.0 Host/Function Module (USB)
Suspended state detection
Powered
state
(DVSQ = 100)
Suspended
state
(DVSQ = 100)
USB bus reset detection
Resume (RESM is set to 1)
USB bus reset detection
Suspended state detection
Default
state
(DVSQ = 001)
Suspended
state
(DVSQ = 101)
Resume (RESM is set to 1)
SetAddress execution
(Address = 0)
SetAddress execution
Address
state
(DVSQ = 010)
Suspended state detection
Suspended
state
(DVSQ = 110)
Resume (RESM is set to 1)
SetConfiguration
execution
(configuration value = 0)
SetConfiguration execution
(configuration value ≠ 0)
Suspended state detection
Configured
state
(DVSQ = 011)
Suspended
state
(DVSQ = 111)
Resume (RESM is set to 1)
Note: The DVST bit is set to 1 when the transition drawn with a solid line occurs.
The RESM bit is set to 1 when the transition drawn with a broken line occurs.
Figure 24.6 Device State Transitions
Rev. 1.00 Mar. 25, 2008 Page 1269 of 1868
REJ09B0372-0100