SH7205 Datasheet, PDF (426/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 11 Direct Memory Access Controller (DMAC)
Initial
Bit
Bit Name Value R/W Description
11
2DRLOD 0
R/W Two-Dimensional Addressing Reload Function Enable
This bit is used to enable or disable reloading to the six
current two-dimensional addressing registers upon detection
of the DMA transfer end condition. When this bit is cleared to
0, the contents of the six reload registers for two-dimensional
addressing are not reloaded to the six current two-
dimensional addressing registers. If the DMA transfer end
condition is detected when this bit is set to 1, the contents of
the six reload registers are reloaded to the six current two-
dimensional addressing registers. This bit is only valid in
channels 0 to 7.
0: Two-dimensional addressing reload function disabled
1: Two-dimensional addressing reload function enabled
10
BRLOD 0
R/W DMA Byte Count Reload Function Enable
This bit is used to select whether to reload the byte counter
when the DMA transfer end condition is detected. When this
bit is cleared to 0, reloading is not performed. If the DMA
transfer end condition is detected when this bit is set to 1,
the contents of the DMA reload byte count register
(DMRBCTn) are reloaded to the DMA current byte count
register (DMCBCTn).
0: Byte count reload function disabled
1: Byte count reload function enabled
9
SRLOD 0
R/W DMA Source Address Reload Function Enable
This bit is used to select whether to reload the source
address when the DMA transfer end condition is detected.
When this bit is cleared to 0, reloading is not performed. If
the DMA transfer end condition is detected when this bit is
set to 1, the contents of the DMA reload source address
register (DMRSADRn) are reloaded to the DMA current
source address register (DMCSADRn).
0: Source address reload function disabled
1: Source address reload function enabled
Rev. 1.00 Mar. 25, 2008 Page 394 of 1868
REJ09B0372-0100