SH7205 Datasheet, PDF (42/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 1 Overview
Items
Specification
On-chip RAM
• CPU0: 64-Kbyte memory for high-speed operation (16 Kbytes × 4)
• CPU1: 32-Kbyte memory for high-speed operation (16 Kbytes × 2)
• 16-Kbyte memory for data retention
I/O ports
• 96 I/Os and 11 inputs
• Input or output can be selected for each bit
• Internal weak keeper circuit
Power-down modes • Six power-down modes provided to reduce power consumption of this
LSI
 Dual-processor mode
 Single-processor mode
 Dual sleep mode
 Software standby mode
 Deep standby mode
 Module standby mode
User debugging
interface (H-UDI)
• E10A emulator support
• JTAG-standard pin assignment
Power supply voltage • Vcc: 1.1 to 1.3 V
• PVcc: 3.0 to 3.6 V
Packages
• 272-pin BGA, 17-mm square, and 0.8-mm pitch
JEITA Package Code: P-FBGA272-17×17-0.80
Renesas Code: PRBG0272GA-A
Rev. 1.00 Mar. 25, 2008 Page 10 of 1868
REJ09B0372-0100