SH7205 Datasheet, PDF (1525/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 27 Pin Function Controller (PFC)
27.2.8 Port D I/O Register L (PDIORL)
PDIORL is a 16-bit readable/writable register that is used to set the pins on port D as inputs or
outputs. The PD2IOR to PD0IOR bits correspond to the PD2 to PD0 pins, respectively. The
setting of PDIORL is valid for the pins for which general I/O function is selected and has no effect
on the pins for which other function is selected. If a bit in PDIORL is set to 1, the corresponding
pin on port D functions as an output. If it is cleared to 0, the corresponding pin functions as an
input.
Bits 15 to 3 in PDIORL are reserved. These bits are always read as 0. The write value should
always be 0.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
-
PD2 PD1 PD0
IOR IOR IOR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R R/W R/W R/W
27.2.9 Port D Control Register L1 (PDCRL1)
PDCRL1 is 16-bit readable/writable register that is used to select the functions of the multiplexed
pins on port D. See table 27.4 for the multiplexed functions.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
PD2MD[3:0]
PD1MD[3:0]
PD0MD[3:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
15 to 12 
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
11 to 8 PD2MD[3:0] 0000 R/W PD2 Mode
Select the function of the PD2.
7 to 4 PD1MD[3:0] 0000 R/W PD1 Mode
Select the function of the PD1.
3 to 0 PD0MD[3:0] 0000 R/W PD0 Mode
Select the function of the PD0.
Rev. 1.00 Mar. 25, 2008 Page 1493 of 1868
REJ09B0372-0100