SH7205 Datasheet, PDF (241/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 7 Interrupt Controller (INTC)
7.7 Interrupt Response Time
Table 7.9 lists the interrupt response time, which is the time from the occurrence of an interrupt
request until the interrupt exception handling starts and fetching of the first instruction in the
exception service routine begins. The interrupt processing operations differ in the cases when
banking is disabled, when banking is enabled without register bank overflow, and when banking is
enabled with register bank overflow. Figures 7.4 and 7.5 show examples of pipeline operation
when banking is disabled. Figures 7.6 and 7.7 show examples of pipeline operation when banking
is enabled without register bank overflow. Figures 7.8 and 7.9 show examples of pipeline
operation when banking is enabled with register bank overflow.
Table 7.9 Interrupt Response Time
Number of States*¹
Item
Peripheral
Module
User
(except
NMI
Break
H-UDI
IRQ, PINT USB
USB)
Remarks
Time from occurrence of interrupt 2 Incyc +
request until interrupt controller
2 Bcyc +
identifies priority, compares it with 1 Pcyc
mask bits in SR, and sends interrupt
request signal to CPU
3 Incyc
2 Incyc +
1 Pcyc
2 Incyc +
3 Bcyc +
1 Pcyc
2 Incyc +
4 Bcyc
2 Incyc +
2 Bcyc
Time from
No register Min. 3 Icyc + m1 + m2
input of
interrupt
banking used
Max. 4 Icyc + 2 (m1 + m2) + m3
request signal
to CPU until
sequence
currently being
Register
Min. 
executed is
completed,
banking used
Max. 
without
interrupt
register bank
exception
overflow
handling starts,
3 Icyc + m1 + m2
12 Icyc + m1 + m2
and first
instruction in ^Register
Min. 
exception
banking used
Max. 
service routine ^{with register}
is fetched
bank
overflow
3 Icyc + m1 + m2
3 Icyc + m1 + m2 + 19(m4)
Min. is obtained when the
interrupt wait time is zero.
Max. is obtained when a
higher-priority interrupt
request has occurred during
interrupt exception handling.
Min. is obtained when the
interrupt wait time is zero.
Max. is obtained when an
interrupt request has
occurred during execution of
the RESBANK instruction.
Min. is obtained when the
interrupt wait time is zero.
Max. is obtained when an
interrupt request has
occurred during execution of
the RESBANK instruction.
Rev. 1.00 Mar. 25, 2008 Page 209 of 1868
REJ09B0372-0100