SH7205 Datasheet, PDF (1610/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 30 Power-Down Modes
(2) Canceling Deep Standby Mode
Deep standby mode is canceled by interrupts (NMI or IRQ allocated to PJ3 to PJ0 and PC3 to
PC0) or a reset (manual reset or power-on reset). When canceling deep standby mode by the NMI
or IRQ interrupt, a power-on reset exception handling is executed instead of an interrupt exception
handling. When canceling deep standby mode by manual reset, a power-on reset exception
handling is also executed. After executing the power-on reset exception handling, the LSI enters
dual-processor mode. Figure 30.4 shows the flowchart of canceling deep standby mode.
Detect an interrupt
(NMI or IRQ)
Count oscillation settling
time
Deep standby mode
Detect MRES
The MRES pin is held low
during oscillation settling
time
No
RAMBOOT = 1
Yes
Power-on reset
exception handling
Read PC from H'FF800000
Read SP from H'FF800004
Power-on reset
exception handling
Read PC from H'00000000
Read SP from H'00000004
Detect RES
The RES pin is held low
during oscillation settling
time
Power-on reset
exception handling
Read PC from H'00000000
Read SP from H'00000004
To the initialization routine
Check the flags in DSFR
Exception handling according to
deep standby mode cancel source
Reconfiguration of
peripheral functions*
Clear the IOKEEP bit in DSFR
(Release the pin state retention)
To dual-processor mode
Note: * Peripheral functions include all functions such as CPG, INTC, BSC, I/O ports, PFC,
and peripheral modules.
Figure 30.4 Flowchart of Canceling Deep Standby Mode
Rev. 1.00 Mar. 25, 2008 Page 1578 of 1868
REJ09B0372-0100