SH7205 Datasheet, PDF (1844/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 33 Electrical Characteristics
Table 33.26 ATAPI Interface Multi-Word Transfer Timing
Conditions: PVCC = 3.3 ± 0.3 V, Ta = −20 to 85 °C, PVSS = 0 V
Item
Cycle time
IDEIORD#/IDEIOWR# pulse width
IDEIORD# data access time
IDEIORD# data hold time
IDEIORD# data setup time
IDEIOWR# data setup time
IDEIOWR# data hold time
IODACK# data setup time
IODACK# data hold time
IDEIORD# negate pulse width
IDEIOWR# negate pulse width
IDEIORD# IODREQ delay time
IDEIOWR# IODREQ delay time
IDECS#[1:0] setup time
IDECS#[1:0] hold time
IODACK# 3-state delay time
DREQ negate detection time
(from rise of IDEIORD#/IDEIOWR# to fall of
IODREQ)
Mode 0 Mode 1 Mode 2
Symbol Conditions ns
ns
ns
Figure
t₀
Min.
480 150 120 Figures
t_D
Min.
215 80
70
33.61 to
33.64
t_E
Max.
150 60
50
t_F
Min.
5
5
5
t_G
Min.
100 30
20
Min.
100 30
20
t_H
Min.
t_I
Min.
t_J
Min.
t_KR
Min.
t_KW
Min.
t_LR
Max.
t_LW
Max.
t_M
Min.
t_N
Min.
t_Z
Max.
t_S
Min.
Max.
20
15
10
0
0
0
20
5
5
50
50
25
215 50
25
120 40
35
40
40
35
50
30
25
15
10
10
20
25
25
20
20
20
45
45
45
Rev. 1.00 Mar. 25, 2008 Page 1812 of 1868
REJ09B0372-0100