SH7205 Datasheet, PDF (472/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 11 Direct Memory Access Controller (DMAC)
11.7 DMA Requests
11.7.1 DMA Request Sources
DMA request sources include software triggers and DMA request signal inputs. DMA request
signal input sources are selected from the DMA request source select bits (DCTG) of DMA
control register A (DMCNTAn) of each channel.
11.7.2 Synchronization Circuits for DMA Request Signal Inputs
Each DMAC channel is provided with a synchronization circuit to cope with asynchronously input
DMA request signals. Therefore, a blank period of a few clock cycles appears during the period
from the point when a DMA request signal input such as DREQ0 to DREQ3 goes active until the
request is reflected in the DMA request bit (DREQ) in DMA control register B (DMCNTBn).
Figure 11.7 shows an example of the DMA request bit timing of DMA request signal input.
Rev. 1.00 Mar. 25, 2008 Page 440 of 1868
REJ09B0372-0100