SH7205 Datasheet, PDF (1450/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 26 2D Graphics Engine (2DG)
With the above settings, the blit function operates as follows:
1. By the GR_BLTPLY register settings, image data equal to the pixel count set in the
GR_SABSET register is transferred to the SB buffer.
2. The pixel data transferred to the SB buffer undergoes various processings set by the relevant
registers.
3. Image data equal to the number of pixels set in the GR_DCSET register is output to the DC
buffer.
The DMAC first transfers, memory-to-memory, pixels equal to the pixel count set in the register
from an SDRAM area specified by the CPU to the SB buffer. After that, the DMAC transfers,
memory-to-memory, the pixel data processed in the 2DG from the DC buffer to the SDRAM area
specified by the CPU. As a result, the image on any area on the SDRAM can be replaced with
pixel data having undergone various image processings by the 2DG. In this case, the 2DG
performs input to the SB buffer and output from the DC buffer.
Blit (Without blending)
DMAC3
Input image
Number of pixels = Nb
Color value = Cd
α value = αd
SB
buffer
Output image
DMAC2
Number of pixels = Nc
Color value = Cc
α value = αc
DC
buffer
The DMAC controlled by the CPU
issues the addresses of the both
memories and performs
a memory-to-memory transfer.
Color value = Cd
α value = αd
Result of transfer
Output image
Number of pixels = Nc
Color value = Cc
α value = αc
Image plane in the SDRAM
Sets the number of pixels (Nc) to be transferred to the DC buffer. (By setting the GR_DCSET register)
Sets the number of pixels (Nb) to be transferred to the SB buffer. (By setting the GR_SABSET register)
Sets blitter operating mode. (By setting the BTYPE bits of the GR_BLTMODE register to 00: Blit operation)
GCOLR = (The value set by user), GALFA = (The value set by user), FBFA = 1
Resizing (Set by user), Logical operation (Set by user)
Executes the processing. (By setting the GR_BLTPLY register to 10)
Data output to the DC buffer
2DG
Figure 26.25 Example of Blit Function without Blending
Rev. 1.00 Mar. 25, 2008 Page 1418 of 1868
REJ09B0372-0100