SH7205 Datasheet, PDF (1008/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 20 Controller Area Network (RCAN-TL1)
Bit[15:0]: TXPR1
0
1
Description
Transmit message idle state in corresponding mailbox (Initial value)
[Clearing Condition]
Completion of message transmission (for Event Triggered Messages) or
message transmission abortion (automatically cleared)
Transmission request made for corresponding mailbox
• TXPR0
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
TXPR0[15:1]
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R
Note: * It is possible only to write a ‘1’ for a Mailbox configured as transmitter.
Bit 15 to 1 — Indicates that the corresponding Mailbox is requested to transmit a CAN Frame.
The bit 15 to 1 corresponds to Mailbox-15 to 1 respectively. When multiple bits are set, the order
of the transmissions is governed by the MCR2 – CAN-ID or Mailbox number.
Bit[15:1]: TXPR0
0
1
Description
Transmit message idle state in corresponding mailbox (Initial value)
[Clearing Condition]
Completion of message transmission (for Event Triggered Messages) or
message transmission abortion (automatically cleared)
Transmission request made for corresponding mailbox
Bit 0— Reserved: This bit is always ‘0’ as this is a receive-only Mailbox. Writing a ‘1’ to this bit
position has no effect. The returned value is ‘0’.
Rev. 1.00 Mar. 25, 2008 Page 976 of 1868
REJ09B0372-0100