SH7205 Datasheet, PDF (505/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
• TIORL_0, TIORL_3, TIORL_4
Bit: 7
Initial value: 0
R/W: R/W
6
5
IOD[3:0]
0
0
R/W R/W
4
0
R/W
3
0
R/W
2
1
IOC[3:0]
0
0
R/W R/W
0
0
R/W
Bit
Bit Name
7 to 4 IOD[3:0]
3 to 0 IOC[3:0]
Initial
Value
0000
0000
R/W
R/W
R/W
Description
I/O Control D0 to D3
Specify the function of TGRD.
See the following tables.
TIORL_0: Table 12.12
TIORL_3: Table 12.16
TIORL_4: Table 12.18
I/O Control C0 to C3
Specify the function of TGRC.
See the following tables.
TIORL_0: Table 12.20
TIORL_3: Table 12.24
TIORL_4: Table 12.26
Rev. 1.00 Mar. 25, 2008 Page 473 of 1868
REJ09B0372-0100