SH7205 Datasheet, PDF (1827/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 33 Electrical Characteristics
33.4.11 SSIF Timing
Table 33.16 SSIF Timing
Conditions: VCC = PLLVCC = 1.1 to 1.3 V, USBDVCC = 1.1 to 1.3 V, USBAVCC = 1.1 to 1.3 V,
PVCC = 3.0 to 3.6 V, AVCC = 3.0 to 3.6 V, USBAPVCC = 3.0 to 3.6 V,
2DGAPVCC0 = 3.0 to 3.6 V, 2DGAPVCC1 = 3.0 to 3.6 V,
VSS = PLLVSS = USBAVSS = AVSS = USBAPVSS = 2DGAPVSS0 = 2DGAPVSS1 = 0 V,
Ta = −20 to 85 °C
Item
Output clock cycle
Input clock cycle
Clock high
Clock low
Clock rise time
Delay
Symbol
tO
tI
tHC
tLC
tRC
tDTR
Min.
80
80
32
32

−5
Setup time
tSR
25
Hold time
tHTR
5
AUDIO_CLK input frequency fAUDIO
1
Max. Unit
64000 ns
64000 ns

ns

ns
25
ns
25
ns

ns

ns
40
MHz
Remarks
Output
Input
Bidirectional
Output
Transmit
Receive
Receive,
transmit
Figure
Figure
33.36
Figures
33.37,
33.38
Figures
33.39,
33.40
Figures
33.37 to
33.40
Figure
33.41
SSISCKn
t_HC
t_RC
t_LC
t_I ,t_O
Figure 33.36 Clock Input/Output Timing
Rev. 1.00 Mar. 25, 2008 Page 1795 of 1868
REJ09B0372-0100