SH7205 Datasheet, PDF (1854/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 33 Electrical Characteristics
(DSTROBE)
IDEIORDY
(Device)
Read
IDED[15:0]
(Device)
(DSTROBE)
IDEIORDY
(Host)
Read
IDED[15:0]
(Host)
t_DVH
t_2CYC (t_2CYCTYP)
t_CYC
t_CYC
t_DVS
t_DVH
t_DVS
t_2CYC
t_DVH
t_DH
t_DS
t_DH
t_DS
t_DH
Figure 33.66 Sustained Ultra DMA Data-In Burst
IODREQ
(Device)
IODACK#
(Host)
(STOP)
IDEIOWR#
(Host)
(HDMARDY#)
IDEIORD#
(Host)
(DSTROBE)
IDEIORDY
(Device)
t_RP
t_RFS
Read
IDED[15:0]
Figure 33.67 Host Pausing Ultra DMA Data-In Burst
Rev. 1.00 Mar. 25, 2008 Page 1822 of 1868
REJ09B0372-0100