SH7205 Datasheet, PDF (1105/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 23 AND/NAND Flash Memory Controller (FLCTL)
23.3.1 Common Control Register (FLCMNCR)
FLCMNCR is a 32-bit readable/writable register that specifies the type (AND/NAND) of flash
memory, access mode, and other items.
Bit: 31 30 29 28 27 26 25 24 23 22 21
-
-
-
-
-
-
ECCPOS 4ECCCN
4ECCCO
[2]
TEN ^4ECCEN RRECT
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R R/W R/W R/W R/W R
Bit: 15 14 13 12 11 10 9
8
7
6
5
FCK
SEL
- ECCPOS[1:0]
ACM[1:0]
NAND
WF
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R R/W R/W R/W R/W R/W R
R
R
R
20 19 18 17 16
-
-
SNAND
QT
SEL
-
0
0
0
0
0
R
R R/W R/W R
4
3
2
-
CE
-
0
0
0
R R/W R
1
0
-
TYPE
SEL
0
0
R R/W
Initial
Bit
Bit Name Value R/W
31 to 26 —
All 0 R
25
ECCPOS[2] 0
R/W
24
4ECCCN 0
R/W
TEN
23
4ECCEN 0
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
See the description of ECCPOS[1:0] at bits 13 and 12.
4-Symbol ECC Error Count
Selects whether to output to the FL4ECCCNT register
the total number of errors found in the sectors that have
been read and the maximum number of errors found in
a single sector.
0: Error counting is not performed.
1: When 4-symbol ECC circuit is used, the total number
of errors found in the read sectors and the maximum
number of errors in a sector are output to
FL4ECCCNT.
Note: When this bit is set to 1, the 4ECCCORRECT bit
must be cleared to 0.
4-Symbol ECC Circuit Enable
Enables the 4-symbol ECC circuit by setting this bit to 1
in sector access mode.
0: 3-symbol ECC circuit is enabled.
1: 4-symbol ECC circuit is enabled.
Note: When AND flash memory is used, this bit must
be cleared to 0. For using 4-symbol ECC
circuit, see section 23.7, Usage Notes.
Rev. 1.00 Mar. 25, 2008 Page 1073 of 1868
REJ09B0372-0100