SH7205 Datasheet, PDF (1501/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 26 2D Graphics Engine (2DG)
(2) Determination of the DAC Output Current (I/O Max.)
This DAC is designed for a maximum output voltage of 1.0 V. Therefore, I/O max. can be
calculated once RL is determined.
I/O max. = 1.0 / RL (if RL = 180 Ω, I/O max. = 5.6 mA)
Note: I/O max. should be designed for 13.4 mA or less. Exceeding this limit can cause decreases
in performance and reliability.
(3) Determination of the Rext Resistance
As illustrated in figure 26.59, internally in this module the current cells are driven by means of a
circuit that uses op amp.
When VCCA = 3.3 V, the "+" pin of the op amp is set so that it will be approximately 0.91 V.
Since negative feedback is applied to the op amp, approximately 0.91 V also appears on the REXT
pin.
Since each current cell is designed to act as a current mirror with respect to a load circuit for the
op amp, reducing the external resistance Rext increases the output current from each current cell,
and increases the output current from analog outputs R, G, and B. For full-scale output, the
relationship between the output current I/O max. and the Rext resistance is given by the following
equation:
Rext = {VCCA × (4 / 15) + 0.03} × (1023 / 32) / I/O max.
Rext = [VCCA × (4/15) + 0.03] × (1023/32)/ I/O Max.
VCCA (3.3 V)
CBU
VCCA (3.3 V)
Current
cell
Current
cell
Current
cell
0.91 V ₊
-
REXT
Rext
R
RL
IO
G
Analog RL
output
IO
B
Analog RL
output
IO
Analog
output
Figure 26.59 Current Cells and Analog Outputs
Rev. 1.00 Mar. 25, 2008 Page 1469 of 1868
REJ09B0372-0100