SH7205 Datasheet, PDF (1242/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 USB 2.0 Host/Function Module (USB)
24.3.32 DCP Configuration Register (DCPCFG)
DCPCFG specifies the data transfer direction for the default control pipe (DCP).
This register is initialized by a power-on reset.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
—
—
— DIR —
—
—
—
Initial value: -
-
-
-
-
-
-
-
-
-
-
0
-
-
-
-
R/W: R
R
R
R
R
R
R
R
R
R
R R/W R
R
R
R
Initial
Bit
Bit Name
Value
R/W Description
15 to 5 
Undefined R
Reserved
Undefined values are read from these bits. The
write value should always be 0.
4
DIR
0
R/W Transfer Direction
When the host controller function is selected, this
bit sets the transfer direction of the data stage and
status stage.
0: Data receiving direction
1: Data transmitting direction
3 to 0 
Undefined R
Reserved
Undefined values are read from these bits. The
write value should always be 0.
Note: When the function controller function is selected, the DIR bit should be cleared to 0.
Rev. 1.00 Mar. 25, 2008 Page 1210 of 1868
REJ09B0372-0100