SH7205 Datasheet, PDF (1553/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 28 I/O Ports
Bit
15, 14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Initial
Bit Name Value R/W
—
All 0
R
PE13DR
PE12DR
PE11DR
PE10DR
PE9DR
PE8DR
PE7DR
PE6DR
PE5DR
PE4DR
PE3DR
PE2DR
PE1DR
PE0DR
0
R/W
Pin state R
0
R/W
Pin state R
0
R/W
Pin state R
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Description
Reserved
These bits are always read as 0 and cannot be
modified.
See table 28.6.
Table 28.6 Port E Data Register L (PEDRL) Read/Write Operation
• Bits 13, 11, 9, 7 to 0 of PEDRL
PEIORL
0
1
Pin Function
General input
Read Operation
Pin state
Other than
general input
General output
Other than
general output
Pin state
PEDRL value
PEDRL value
Write Operation
Can write to PEDRL, but it has no effect on pin
state
Can write to PEDRL, but it has no effect on pin
state
Value written is output from pin
Can write to PEDRL, but it has no effect on pin
state
Rev. 1.00 Mar. 25, 2008 Page 1521 of 1868
REJ09B0372-0100