SH7205 Datasheet, PDF (1565/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 28 I/O Ports
28.2.18 Port K Data Register L (PKDRL)
PKDRL is a 16-bit readable/writable register that stores port K data. The PK1DR and PK0DR bits
correspond to the PK1 and PK0 pins, respectively.
When a pin function is general output, if a value is written to PKDRL, that value is output from
the pin, and if PKDRL is read, the register value is returned regardless of the pin state.
When a pin function is general input, if PKDRL is read, the pin state, not the register value, is
returned directly. If a value is written to PKDRL, although that value is written into PKDRL, it
does not affect the pin state. Table 28.11 summarizes PKDRL read/write operations.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PK1 PK0
DR DR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R R/W R/W
Initial
Bit
Bit Name Value R/W Description
15 to 2 —
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
1
PK1DR 0
R/W See table 28.11.
0
PK0DR 0
R/W
Table 28.11 Port K Data Register L (PKDRL) Read/Write Operations
• Bits 1 and 0 of PKDRL
PKIORL
0
1
Pin Function
General input
Read Operation
Pin state
Other than
general input
General output
Other than
general output
Pin state
PKDRL value
PKDRL value
Write Operation
Can write to PKDRL, but it has no effect on pin
state
Can write to PKDRL, but it has no effect on pin
state
Value written is output from pin
Can write to PKDRL, but it has no effect on pin
state
Rev. 1.00 Mar. 25, 2008 Page 1533 of 1868
REJ09B0372-0100