SH7205 Datasheet, PDF (487/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
This LSI has an on-chip multi-function timer pulse unit 2 (MTU2) that comprises five 16-bit timer
channels.
12.1 Features
• Maximum 16 pulse input/output lines
• Selection of eight counter input clocks for each channel
• The following operations can be set:
 Waveform output at compare match
 Input capture function
 Counter clear operation
 Multiple timer counters (TCNT) can be written to simultaneously
 Simultaneous clearing by compare match and input capture is possible
 Register simultaneous input/output is possible by synchronous counter operation
 A maximum 12-phase PWM output is possible in combination with synchronous operation
• Buffer operation settable for channels 0, 3, and 4
• Phase counting mode settable independently for each of channels 1 and 2
• Cascade connection operation
• Fast access via internal 16-bit bus
• 28 interrupt sources
• Automatic transfer of register data
• A/D converter start trigger can be generated
• Module standby mode can be settable
• A total of six-phase waveform output, which includes complementary PWM output, and
positive and negative phases of reset PWM output by interlocking operation of channels 3 and
4, is possible.
• AC synchronous motor (brushless DC motor) drive mode using complementary PWM output
and reset PWM output is settable by interlocking operation of channels 0, 3, and 4, and the
selection of two types of waveform outputs (chopping and level) is possible.
• In complementary PWM mode, interrupts at the crest and trough of the counter value and A/D
converter start triggers can be skipped.
Rev. 1.00 Mar. 25, 2008 Page 455 of 1868
REJ09B0372-0100