SH7205 Datasheet, PDF (724/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 14 Watchdog Timer (WDT)
Writing to the WOVF bit
15
87
0
Address: H'FFFE0004
Address: H'FFFE000C
H'A5
H'00
Writing to the RSTE and RSTS bits
15
Address: H'FFFE0004
Address: H'FFFE000C
H'5A
87
0
Write data
Figure 14.3 Writing to WRCSR
(3) Reading from WTCNT, WTCSR, and WRCSR
The registers of WDT0 are read in a method similar to other registers. WTCSR0 is allocated to
address H'FFFE0000, WTCNT0 to address H'FFFE0002, and WRCSR0 to address H'FFFE0004.
Byte transfer instructions must be used for reading from these registers.
The registers of WDT1 are read in a method similar to other registers. WTCSR1 is allocated to
address H'FFFE0008, WTCNT1 to address H'FFFE000A, and WRCSR1 to address H'FFFE000C.
Byte transfer instructions must be used for reading from these registers.
Rev. 1.00 Mar. 25, 2008 Page 692 of 1868
REJ09B0372-0100