SH7205 Datasheet, PDF (1516/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 27 Pin Function Controller (PFC)
27.2.1 Port A I/O Register L (PAIORL)
PAIORL is a 16-bit readable/writable register that is used to set the pins on port A as inputs or
outputs. The PA15IOR to PA0IOR bits correspond to the PA15 to PA0 pins, respectively. The
setting of PAIORL is valid for the pins for which general I/O function or TIOC I/O function of the
MTU2 is selected. PAIORL has no effect on the pins for which other function is selected. If a bit
in PAIORL is set to 1, the corresponding pin on port A functions as output. If it is cleared to 0, the
corresponding pin functions as input.
Bit: 15
PA15
IOR
Initial value: 0
R/W: R/W
14
PA14
IOR
0
R/W
13
PA13
IOR
0
R/W
12
PA12
IOR
0
R/W
11
PA11
IOR
0
R/W
10
PA10
IOR
0
R/W
9
PA9
IOR
0
R/W
8
PA8
IOR
0
R/W
7
PA7
IOR
0
R/W
6
PA6
IOR
0
R/W
5
PA5
IOR
0
R/W
4
PA4
IOR
0
R/W
3
PA3
IOR
0
R/W
2
PA2
IOR
0
R/W
1
PA1
IOR
0
R/W
0
PA0
IOR
0
R/W
27.2.2 Port A Control Registers L1 to L4 (PACRL1 to PACRL4)
PACRL1 to PACRL4 are 16-bit readable/writable registers that are used to select the function of
the multiplexed pins on port A. See table 27.1 for the multiplexed functions.
(1) Port A Control Register L4 (PACRL4)
Bit: 15
Initial value: 0
R/W: R/W
14 13
PA15MD[3:0]
0
0
R/W R/W
12 11
0/1* 0
R/W R/W
10 9
PA14MD[3:0]
0
0
R/W R/W
8
7
0/1* 0
R/W R/W
6
5
PA13MD[3:0]
0
0
R/W R/W
4
3
0/1* 0
R/W R/W
2
1
PA12MD[3:0]
0
0
R/W R/W
0
0/1*
R/W
Initial
Bit
Bit Name Value R/W Description
15 to 12 PA15MD[3:0] 0000/ R/W PA15 Mode
0001*
Select the function of the PA15.
11 to 8 PA14MD[3:0] 0000/ R/W PA14 Mode
0001*
Select the function of the PA14.
7 to 4 PA13MD[3:0] 0000/ R/W PA13 Mode
0001*
Select the function of the PA13.
3 to 0 PA12MD[3:0] 0000/ R/W PA12 Mode
0001*
Select the function of the PA12.
Note: * The initial value is 0000 in 16-bit mode (MD = 0), and 0001 in 32-bit mode (MD= 1).
Rev. 1.00 Mar. 25, 2008 Page 1484 of 1868
REJ09B0372-0100