SH7205 Datasheet, PDF (192/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 7 Interrupt Controller (INTC)
Figure 7.1 shows a block diagram of the INTC.
External pin
interrupt request
NMI
IRQ7 to IRQ0
PINT7 to PINT0
Interrupt request exclusively
used for peripheral modules
DMAC, WDT,
MTU2, IIC3,
SCIF, SSIF,
SSU, ADC,
2DG, ATAPI,
FLCTL, RTC,
SDHI, RCAN-TL1,
IEB, AESOP
Interrupt request also
used for peripheral modules
CMT, MTU2,
IIC3, SCIF,
SSIF, SSU,
ADC, FLCTL,
SDHI, RCAN-TL1
Peripheral module
DMA transfer request
CMT, MTU2,
IIC3, SCIF,
SSIF, SSU,
ADC, FLCTL,
SDHI, RCAN-TL1
DMA transfer
request
controller
Interrupt
detect
controller
...
IDCNT
IDCNT5 to IDCNT139
Input control ^{(Interrupt request)}
Prioritizer
Input control
Prioritizer
...
DREQER
DREQER0 to DREQER8
C0ICR0
C0ICR1
C0ICR2 C0IRQRR
C0PINTER C0PIRR
C0IBCR
C0IBNR
C0INTER C0IRQER
C1ICR0 to C1IRQER
...
IPR
C0IPR01 to C0IPR21
C1IPR01 to C1IPR21
Module bus
Bus interface
CPU0
Interrupt request
SR
I3 I2 I1 I0
IPCR
C0IPCR15 to
C0IPCR08
C1IPCR15 to
C1IPCR08
IPER
C0IPER
C1IPER
CPU1
Interrupt request
SR
I3 I2 I1 I0
Figure 7.1 Block Diagram of INTC
Rev. 1.00 Mar. 25, 2008 Page 160 of 1868
REJ09B0372-0100