SH7205 Datasheet, PDF (1400/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 26 2D Graphics Engine (2DG)
26.3.16 Resize Horizontal Starting Phase Register for Blitter (GR_HSPHAS)
The register GR_HSPHAS sets results of the starting position phase computation in the horizontal
direction for the blitter resizing.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
-
-
-
-
H1PHS_DCML
Initial value: -
-
-
-
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
H1PHS_INTGR
Initial value: -
-
-
-
-
-
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit name
Initial
Value
R/W Description
31 to 28 
Undefined R Reserved
The read value is undefined. The write value should
always be 0.
27 to 16 H1PHS_DCML H'000
R/W Horizontal Starting Position Phase Computation
Result Fractional Part
These bits set the fractional part of the starting-
position phase computation result in the horizontal
direction on the source side.
15 to 10 
Undefined R Reserved
The read value is undefined. The write value should
always be 0.
9 to 0 H1PHS_INTGR H'000
R/W Horizontal Starting Position Phase Computation
Result Integer Part
These bits set the integer part of the starting-position
phase computation result in the horizontal direction
on the source side.
Notes: 1. This register must be set before resizing. All bits should be cleared to 0 when resizing is
not performed.
2. When the H1PHS_INTGR bits are odd (H1PHS_INTGR [0] = 1), be sure to set the
SZEL1 bit in GR_DMAC to 0 (16 bits).
Rev. 1.00 Mar. 25, 2008 Page 1368 of 1868
REJ09B0372-0100