SH7205 Datasheet, PDF (1147/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 23 AND/NAND Flash Memory Controller (FLCTL)
Starting single-sector read/continuous sector read
Start
3-symbol ECC circuit is enabled.
No
4ECCEN bit in
FLCMNCR = 1?
Yes
Perform sector reading with
ECC generation only.
No
FLCMDCR.
SCTCNT == 0?
Yes
End
No
4ECCCORRECT
bit in FLCMNCR = 1?
Yes
Read one sector.
No
ECC error occurred?
Yes
Reading operation is suspended
after ECC error-containing sector
has been read.
4ECCEXST in FL4ECCCR is set
and correction pattern
generation starts.
Results of ECC processing are
set in FL4ECCCR and
FL4ECCRES1 to FL4ECCRES4.
End
Figure 23.18 Flow of 4-Symbol ECC Operation
Rev. 1.00 Mar. 25, 2008 Page 1115 of 1868
REJ09B0372-0100