SH7205 Datasheet, PDF (1505/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 27 Pin Function Controller (PFC)
Section 27 Pin Function Controller (PFC)
The pin function controller (PFC) is composed of registers that are used to select the functions of
multiplexed pins and assign pins to be inputs or outputs. Tables 27.1 to 27.10 list the multiplexed
pins of this LSI.
Table 27.1 Multiplexed Pins (Port A)
0000
Setting Function 1
Register (General I/O)
PACRL4 PA15 I/O (port)
PA14 I/O (port)
PA13 I/O (port)
PA12 I/O (port)
PACRL3 PA11 I/O (port)
PA10 I/O (port)
PA9 I/O (port)
PA8 I/O (port)
PACRL2 PA7 I/O (port)
PA6 I/O (port)
PA5 I/O (port)
PA4 I/O (port)
PACRL1 PA3 I/O (port)
PA2 I/O (port)
PA1 I/O (port)
PA0 I/O (port)
Setting of Mode Bits (PAnMD[3:0])
0001
Function 2
(Related Module)
0010
Function 3
(Related Module)
D31 I/O (data)
IDED15 I/O (ATAPI)
D30 I/O (data)
IDED14 I/O (ATAPI)
D29 I/O (data)
IDED13 I/O (ATAPI)
D28 I/O (data)
IDED12 I/O (ATAPI)
D27 I/O (data)
IDED11 I/O (ATAPI)
D26 I/O (data)
IDED10 I/O (ATAPI)
D25 I/O (data)
IDED9 I/O (ATAPI)
D24 I/O (data)
IDED8 I/O (ATAPI)
D23 I/O (data)
IDED7 I/O (ATAPI)
D22 I/O (data)
IDED6 I/O (ATAPI)
D21 I/O (data)
IDED5 I/O (ATAPI)
D20 I/O (data)
IDED4 I/O (ATAPI)
D19 I/O (data)
IDED3 I/O (ATAPI)
D18 I/O (data)
IDED2 I/O (ATAPI)
D17 I/O (data)
IDED1 I/O (ATAPI)
D16 I/O (data)
IDED0 I/O (ATAPI)
0011
Function 4
(Related Module)
ADTRG input (analog)

TEND1 output (DMAC)
DACK1 output (DMAC)
DREQ1 input (DMAC)
TEND0 output (DMAC)
DACK0 output (DMAC)
DREQ0 input (DMAC)
TCLKD input (MTU2)
TCLKC input (MTU2)
TCLKB input (MTU2)
TCLKA input (MTU2)


DACK2 output (DMAC)
DREQ2 input (DMAC)
Rev. 1.00 Mar. 25, 2008 Page 1473 of 1868
REJ09B0372-0100