SH7205 Datasheet, PDF (1164/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 USB 2.0 Host/Function Module (USB)
24.3.1 System Configuration Control Register 0 (SYSCFG0)
SYSCFG0 is a register that enables supply of the USB clock to this module and high-speed
operation on PORT0, selects the host controller function or function controller function, controls
the DP and DM pins, and enables operation of the USB block of this module.
This register is initialized by a power-on reset.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
—
— SCKE —
— HSE DCFM DRPD DPRPU —
—
— USBE
Initial value: -
-
-
-
-
0
-
-
0
0
0
0
-
-
-
0
R/W: R
R
R
R
R R/W R
R R/W R/W R/W R/W R
R
R R/W
Bit
Bit Name
15 to 11 
10
SCKE
9, 8

Initial
Value
R/W
Undefined R
0
R/W
Undefined R
Description
Reserved
Undefined values are read from these bits. The write
value should always be 0.
USB Clock Enable
Setting this bit to 1 enables supply of the USB clock to
this module. To disable the USB clock supply, write 0
to this bit.
While this bit is clear, only SYSCFG0 and SYSCFG1
can be written to and writing to other USB module
registers is disabled. Even when this bit is 0, each
register can be read.
0: Disables USB clock supply to this module.
1: Enables USB clock supply to this module.
Reserved
Undefined values are read from these bits. The write
value should always be 0.
Rev. 1.00 Mar. 25, 2008 Page 1132 of 1868
REJ09B0372-0100