SH7205 Datasheet, PDF (164/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 5 Clock Pulse Generator (CPG)
5.6 Notes on Board Design
5.6.1 Note on Inputting the External Clock
Figure 5.3 is an example of connection for the external clock input. When the XTAL pin is to be
left open, ensure the parasitic capacitance is 10 pF or less. To input the external clock at power-on
or recovery from the standby state, wait longer than the oscillation stabilization time.
EXTAL
XTAL
External clock input
Open state
Example of connection with XTAL pin open
Figure 5.3 Example of Connecting External Clock
5.6.2 Note on Using a Crystal Resonator
Place the crystal resonator and capacitors CL1 and CL2 as close as possible to the XTAL and
EXTAL pins. In addition, to minimize induction and thus obtain oscillation at the correct
frequency, the capacitors to be attached to the resonator must be connected to the common ground.
Do not bring wiring patterns close to these components.
Signal lines prohibited
CL1
CL2
Reference value
CL1 = 10 pF
CL2 = 10 pF
EXTAL
XTAL
This LSI
Note:
The values for CL1 and CL2
should be determined after
consultation with the crystal
resonator manufacturer.
Figure 5.4 Note on Using a Crystal Resonator
Rev. 1.00 Mar. 25, 2008 Page 132 of 1868
REJ09B0372-0100