SH7205 Datasheet, PDF (1869/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 33 Electrical Characteristics
33.4.17 2DG Timing
Table 33.30 2DG Video Input Timing
Conditions: VCC = PLLVCC = 1.1 to 1.3 V, USBDVCC = 1.1 to 1.3 V, USBAVCC = 1.1 to 1.3 V,
PVCC = 3.0 to 3.6 V, AVCC = 3.0 to 3.6 V, USBAPVCC = 3.0 to 3.6 V,
2DGAPVCC0 = 3.0 to 3.6 V, 2DGAPVCC1 = 3.0 to 3.6 V,
VSS = PLLVSS = USBAVSS = AVSS = USBAPVSS = 2DGAPVSS0 = 2DGAPVSS1 = 0 V,
Ta = −20 to 85 °C
Item
VICLK clock input cycle time
Input data setup time
Input data hold time
Symbol
tVCKcyc
tVS
tVH
Min.
34
5
3
Max.
40


Unit
Figure
ns
Figure 33.84
ns
ns
VICLK
VIHSYNC,
VIVSYNC,
VICLKENB,
VIDATA[7:0]
t_VCKcyc
t_VS
t_VH
Figure 33.84 Video Input Timing
Rev. 1.00 Mar. 25, 2008 Page 1837 of 1868
REJ09B0372-0100