SH7205 Datasheet, PDF (1369/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 26 2D Graphics Engine (2DG)
Bit
13, 12
11, 10
9, 8
7, 6
Initial
Bit name Value
R/W
SEHF_STAT 00
R

Undefined R
DCHF_STAT 00
R
SBHF_STAT 00
R
Description
Input Buffer E Half-Control for the Output Block
These bits indicate the states of buffers SE1 (bit 12)
and SE2 (bit 13).
00: Both SE1 and SE2 are empty.
01: The size of SE1 coincides but buffer SE2 is
empty.
10: The size of SE2 coincides but buffer SE1 is
empty.
11: The sizes of buffers SE1 and SE2 coincide.
Reserved
The read value is undefined.
Output Buffer C Half-Control of Destination Data from
the Blitter
These bits indicate the states of buffers DC1 (bit 8)
and DC2 (bit 9).
00: Both DC1 and DC2 are empty.
01: The size of DC1 coincides but buffer DC2 is
empty.
10: The size of DC2 coincides but buffer DC1 is
empty
11: The sizes of buffers DC1 and DC2 coincide.
Input Buffer B Half-Control of Data Source for the
Blitter
These bits indicate the state of the buffers SB1 (bit 6)
and SB2 (bit 7).
00: Both SB1 and SB2 are empty.
01: The size of SB1 coincides but buffer SB2 is
empty.
10: The size of SB2 coincides but buffer SB1 is
empty.
11: The sizes of both buffers SB1 and SB2 coincide.
Rev. 1.00 Mar. 25, 2008 Page 1337 of 1868
REJ09B0372-0100